BIOS POST Codes
| Sun Fire V20z and Sun Fire V40z Servers--User Guide |
| A P P E N D I X B |
| BIOS POST Codes |
Typically, the BIOS displays warning or error messages on the video display in the event of hardware or configuration errors. However, in some cases the error might be so severe that the BIOS halts immediately or the BIOS might be unable to initialize video. In these cases, it can be useful to determine the last power-on self-test (POST) task that the BIOS was executing. This is indicated by the value written to port 80.
For information about retrieving the last port 80 POST code using the sp get port80 command, refer to the Sun Fire V20z and Sun Fire V40z Servers--Server Management Guide for details.
You can also retrieve the last 10 port 80 POST codes using the operator panel. Refer to the Sun Fire V20z and Sun Fire V40z Servers--Server Management Guide, for more details about using the operator-panel menus.
TABLE B-1 lists the BIOS POST codes for the Sun Fire V20z and Sun Fire V40z servers.
| POST Code | Description |
|---|---|
| 02 | Verify real mode |
| 03 | Disable non-maskable interrupt (NMI) |
| 04 | Get CPU type |
| 06 | Initialize system hardware |
| 07 | Disable shadow and execute code from the ROM |
| 08 | Initialize chipset with initial POST values |
| 09 | Set IN POST flag |
| 0A | Initialize CPU registers |
| 0B | Enable CPU cache |
| 0C | Initialize caches to initial POST values |
| 0E | Initialize I/O component |
| 0F | Initialize the local bus IDE |
| 10 | Initialize power management |
| 11 | Load alternate registers with initial POST values |
| 12 | Restore CPU control word during warm boot |
| 13 | Initialize PCI bus mastering devices |
| 14 | Initialize keyboard controller |
| 16 | BIOS ROM checksum |
| 17 | Initialize cache before memory autosize |
| 18 | 8254 programmable interrupt timer initialization |
| 1A | 8237 DMA controller initialization |
| 1C | Reset programmable interrupt controller |
| 20 | Test DRAM refresh |
| 22 | Test 8742 keyboard controller |
| 24 | Set ES segment register to 4 GB |
| 26 | Enable gate A20 line |
| 28 | Autosize DRAM |
| 29 | Initialize POST memory manager |
| 2A | Clear 512 KB base RAM |
| 2C | RAM failure on address line xxxx |
| 2E | RAM failure on data bits xxxx of low byte of memory bus |
| 2F | Enable cache before system BIOS shadow |
| 30 | RAM failure on data bits xxxx of high byte of memory bus |
| 32 | Test CPU bus clock frequency |
| 33 | Initialize Phoenix Dispatch Manager |
| 36 | Warm start shut down |
| 38 | Shadow system BIOS ROM |
| 3A | Autosize cache |
| 3C | Advanced configuration of chipset registers |
| 3D | Load alternate registers with CMOS values |
| 41 | Initialize extended memory for RomPilot |
| 42 | Initialize interrupt vectors |
| 45 | POST device initialization |
| 46 | Check ROM copyright notice |
| 47 | Initialize I20 support |
| 48 | Check video configuration against CMOS |
| 49 | Initialize PCI bus and devices |
| 4A | Initialize all video adapters in system |
| 4B | QuietBoot start (optional) |
| 4C | Shadow video BIOS ROM |
| 4E | Display BIOS copyright notice |
| 4F | Initialize MultiBoot |
| 50 | Display CPU type and speed |
| 51 | Initialize EISA board |
| 52 | Test keyboard |
| 54 | Set key click if enabled |
| 55 | Enable USB devices |
| 58 | Test for unexpected interrupts |
| 59 | Initialize POST display service |
| 5A | Display prompt “Press F2 to enter SETUP” |
| 5B | Disable CPU cache |
| 5C | Test RAM between 512 KB and 640 KB |
| 60 | Test extended memory |
| 62 | Test extended memory address lines |
| 64 | Jump to UserPatch1 |
| 66 | Configure advanced cache registers |
| 67 | Initialize multiprocessor APIC |
| 68 | Enable external and CPU caches |
| 69 | Set up system management mode (SMM) area |
| 6A | Display external L2 cache size |
| 6B | Load custom defaults (optional) |
| 6C | Display shadow area message |
| 6E | Display possible high address for UMB recovery |
| 70 | Display error messages |
| 72 | Check for configuration errors |
| 76 | Check for keyboard errors |
| 7C | Set up hardware interrupt vectors |
| 7D | Initialize Intelligent System Monitoring |
| 7E | Initialize coprocessor if present |
| 80 | Disable on-board super I/O ports and IRQs |
| 81 | Late POST device initialization |
| 82 | Detect and install external RS-232 ports |
| 83 | Configure non-MCD IDE controllers |
| 84 | Detect and install external parallel ports |
| 85 | Initialize PC compatible PnP ISA devices |
| 86 | Reinitialize on-board I/O ports |
| 87 | Configure motherboard configurable devices (optional) |
| 88 | Initialize BIOS data area |
| 89 | Enable non-maskable interrupts (NMIs) |
| 8A | Initialize extended BIOS data area |
| 8B | Test and initialize PS/2 mouse |
| 8C | Initialize floppy controller |
| 8F | Determine number of ATA drives (optional) |
| 90 | Initialize hard disk controllers |
| 91 | Initialize local bus hard disk controllers |
| 92 | Jump to UserPatch2 |
| 93 | Build MPTABLE for multiprocessor boards |
| 95 | Install CD-ROM for boot |
| 96 | Clear huge ES segment register |
| 97 | Fix up multiprocessor table |
| 98 | Search for option ROMs |
| 99 | Check for SMART drive (optional) |
| 9A | Shadow option ROMs |
| 9C | Set up power management |
| 9D | Initialize security engine (optional) |
| 9E | Enable hardware interrupts |
| 9F | Determine number of ATA and SCSI drives |
| A0 | Set time of day |
| A2 | Check key lock |
| A4 | Initialize typematic rate |
| A8 | Erase F2 prompt |
| AA | Scan for F2 keystroke |
| AC | Enter setup |
| AE | Clear boot flag |
| B0 | Check for errors |
| B1 | Inform RomPilot about the end of POST |
| B2 | POST done - prepare to boot operating system |
| B4 | One short beep |
| B5 | Terminate QuietBoot (optional) |
| B6 | Check password |
| B7 | Initialize ACPI BIOS |
| B9 | Prepare boot |
| BA | Initialize DMI parameters |
| BB | Initialize PnP option ROMs |
| BC | Clear parity checkers |
| BD | Display multiboot menu |
| BE | Clear screen |
| BF | Check virus and backup reminders |
| C0 | Try to boot with interrupt 19 |
| C1 | Initialize POST Error Manager (PEM) |
| C2 | Initialize error logging |
| C3 | Initialize error display function |
| C4 | Initialize system error handler |
| C5 | PnP dual CMOS (optional) |
| C6 | Initialize notebook docking (optional) |
| C7 | Initialize notebook docking late |
| C8 | Force check (optional) |
| C9 | Extended checksum (optional) |
| CA | Redirect Int 15h to enable remote keyboard |
| CB | Redirect Int 13 to Memory Technologies Devices such as ROM, RAM, PCMCIA and serial disk |
| CC | Redirect Int 10h to enable remote serial video |
| CD | Remap I/O and memory for PCMCIA |
| CE | Initialize digitizer and display message |
| D2 | Unknown interrupt |
TABLE B-2 shows the boot block codes in Flash ROM.
| POST Code | Description |
|---|---|
| E0 | Initialize the chipset |
| E1 | Initialize the bridge |
| E2 | Initialize the CPU |
| E3 | Initialize the system timer |
| E4 | Initialize system I/O |
| E5 | Check force recovery boot |
| E6 | Checksum BIOS ROM |
| E7 | Go to BIOS |
| E8 | Set Huge Segment |
| E9 | Initialize multiprocessor |
| EA | Initialize OEM special code |
| EB | Initialize PIC and DMA |
| EC | Initialize memory type |
| ED | Initialize memory size |
| EE | Shadow boot block |
| EF | System memory test |
| F0 | Initialize interrupt vectors |
| F1 | Initialize run time clock |
| F2 | Initialize video |
| F3 | Initialize System Management Manager |
| F4 | Output one beep |
| F5 | Clear huge segment |
| F6 | Boot to mini DOS |
| F7 | Boot to Full DOS |
| Sun Fire V20z and Sun Fire V40z Servers--User Guide | 817-5248-21 |
Copyright © 2008, Sun Microsystems, Inc. All Rights Reserved.
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