| Edit Values |
| Intel Core i5-520M |
| General Info |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | i5-520M |
| Part Number | BX80617I5520M, CP80617004119AE, CN80617004119AE |
| S-Spec | SLBNB, SLBNA, SLBU3, SLBU4 |
| Market | Mobile, Embedded |
| Introduction | January 7, 2010 (announced)January 7, 2010 (launched) |
| End-of-life | October 19, 2012 (last order)January 18, 2013 (last shipment) |
| Release Price | $225 |
| Shop | Amazon |
| General Specs |
| Family | Core i5 |
| Series | i5-500 |
| Locked | Yes |
| Frequency | 2399.99 MHz |
| Turbo Frequency | Yes |
| Turbo Frequency | 2,933.33 MHz (1 core),2,666.66 MHz (2 cores) |
| Bus type | DMI 1.0 |
| Bus rate | 1 × 2.5 GT/s |
| Clock multiplier | 18 |
| CPUID | 0x20655 |
| Microarchitecture |
| ISA | x86-64 (x86) |
| Microarchitecture | Westmere |
| Platform | Calpella |
| Chipset | Ibex Peak |
| Core Name | Arrandale |
| Core Family | 6 |
| Core Model | 37 |
| Core Stepping | K0, C2 |
| Process | 32 nm |
| Transistors | 382,000,000 |
| Technology | CMOS |
| Die | 81 mm² |
| Word Size | 64 bit |
| Cores | 2 |
| Threads | 4 |
| Max Memory | 8 GiB |
| Multiprocessing |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical |
| TDP | 35 W |
| Tjunction | 0 °C – 105 °C |
| Tstorage | -25 °C – 125 °C |
| Packaging |
| Package | rPGA-988A (rPGA) |  |
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| Dimension | 36 mm x 35 mm x 2.12 mm |
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| Pitch | 1 mm |
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| Pin Count | 988 |
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| Socket | Socket-G1 (PGA) |
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| Package | BGA-1288 (BGA) |  |
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| Dimension | 34 mm x 28 mm x 2.1 mm |
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| Pitch | 0.7 mm |
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| Pin Count | 1288 |
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Core i5-520M is a 64-bit x86 dual-core mobile microprocessor introduced by Intel in 2010. This processor, which is based on the Westmere microarchitecture (Arrandale core), is manufactured on a 32 nm process. This MPU operates at a base frequency of 2.40 GHz with a Turbo Boost frequency of 2.93 GHz and a TDP of 35 W. This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 766.00 MHz.
Contents
- 1 Cache
- 2 Memory controller
- 3 Expansions
- 4 Graphics
- 5 Features
Cache[edit]
Main article: Westmere § Cache [Edit/Modify Cache Info]
 | Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.Note: All units are in kibibytes and mebibytes. |
| L1$ | 128 KiB131,072 B 0.125 MiB | | L1I$ | 64 KiB65,536 B 0.0625 MiB | 2x32 KiB | 4-way set associative | write-back |
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| L1D$ | 64 KiB65,536 B 0.0625 MiB | 2x32 KiB | 8-way set associative | write-back |
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| L2$ | 512 KiB0.5 MiB 524,288 B 4.882812e-4 GiB | | | | 2x256 KiB | 8-way set associative | write-back |
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| L3$ | 3 MiB3,072 KiB 3,145,728 B 0.00293 GiB | | | | 2x1.5 MiB | 12-way set associative | write-back |
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Memory controller[edit]
[Edit/Modify Memory Info]
 | Integrated Memory Controller |
| Max Type | DDR3-1280 |
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| Supports ECC | No |
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| Max Mem | 8 GiB |
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| Controllers | 1 |
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| Channels | 2 |
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| Max Bandwidth | 15.88 GiB/s16,261.12 MiB/s 17.051 GB/s 17,051.02 MB/s 0.0155 TiB/s 0.0171 TB/s |
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| Bandwidth | Single 7.942 GiB/sDouble 15.88 GiB/s |
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| Physical Address (PAE) | 36 bit |
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Expansions[edit]
[Edit/Modify Expansions Info]
 | Expansion Options |
| PCIe | | Revision | 2.0 |
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| Max Lanes | 16 |
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| Configs | 1x16 |
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Graphics[edit]
[Edit/Modify IGP Info]
 | Integrated Graphics Information |
| GPU | HD Graphics (Ironlake) |
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| Designer | Intel | Device ID | 0x0046 |
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| Execution Units | 12 | Max Displays | 2 |
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| Frequency | 500 MHz0.5 GHz 500,000 KHz | Burst Frequency | 766 MHz0.766 GHz 766,000 KHz |
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| Standards | |
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| Additional Features | | Intel Flexible Display Interface (FDI) | | Intel Clear Video | | Intel Clear Video HD |
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Features[edit]
[Edit/Modify Supported Features]
 | Supported x86 Extensions & Processor Features |
| MMX | MMX Extension |
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| EMMX | Extended MMX Extension |
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| SSE | Streaming SIMD Extensions |
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| SSE2 | Streaming SIMD Extensions 2 |
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| SSE3 | Streaming SIMD Extensions 3 |
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| SSSE3 | Supplemental SSE3 |
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| SSE4.1 | Streaming SIMD Extensions 4.1 |
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| SSE4.2 | Streaming SIMD Extensions 4.2 |
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| AES | AES Encryption Instructions |
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| x86-16 | 16-bit x86 |
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| x86-32 | 32-bit x86 |
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| x86-64 | 64-bit x86 |
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| Real | Real Mode |
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| Protected | Protected Mode |
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| SMM | System Management Mode |
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| FPU | Integrated x87 FPU |
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| NX | No-eXecute |
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| HT | Hyper-Threading |
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| TBT 1.0 | Turbo Boost Technology 1.0 |
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| EIST | Enhanced SpeedStep Technology |
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| TXT | Trusted Execution Technology (SMX) |
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| vPro | Intel vPro |
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| VT-x | VT-x (Virtualization) |
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| VT-d | VT-d (I/O MMU virtualization) |
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| EPT | Extended Page Tables (SLAT) |
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| Flex Memory | Flex Memory Access |
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| FMA | Fast Memory Access (w\ GMCH) |
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