Ryzen 5 4600H - AMD - WikiChip
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| Edit Values | |
| Ryzen 5 4600H | |
| General Info | |
| Designer | AMD |
| Manufacturer | TSMC |
| Model Number | 4600H |
| Part Number | 100-000000100 |
| Market | Mobile |
| Introduction | January 6, 2020 (announced)January 6, 2020 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Ryzen 5 |
| Series | 4000 |
| Locked | Yes |
| Frequency | 3,000 MHz |
| Turbo Frequency | 4,000 MHz |
| Clock multiplier | 30 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Zen 2 |
| Core Name | Renoir |
| Core Family | 23 |
| Core Model | 96 |
| Core Stepping | A1 |
| Process | 7 nm |
| Transistors | 9,800,000,000 |
| Technology | CMOS |
| Die | 156 mm² |
| Word Size | 64 bit |
| Cores | 6 |
| Threads | 12 |
| Max Memory | 64 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 45 W |
| cTDP down | 35 W |
| cTDP up | 54 W |
| Tcase | 0 °C – 105 °C |
| Packaging | |
| Package | BGA-1140 (FC-OBGA) |
| Dimension | 35 mm × 25 mm × 1.38 mm |
| Pitch | 0.65 mm |
| Contacts | 1140 |
Ryzen 5 4600H is a 64-bit hexa-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process and based on AMD's Zen 2 microarchitecture, the 4600H operates at a base frequency of 3.0 GHz with a TDP of 45 W and a boost frequency of up to 4.0 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4600H integrates Radeon Vega 6 graphics operating at up to 1.5 GHz.
This model supports a configurable TDP-down of 35 W and TDP-up of 54 W.
This processor is identical to the 4600HS except for its higher TDP.
Contents
- 1 Cache
- 2 Memory controller
- 3 Expansions
- 4 Graphics
- 5 Features
- 6 Die
Cache[edit]
Main article: Zen 2 § Cache[Edit/Modify Cache Info]
| Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.Note: All units are in kibibytes and mebibytes. | |||||||||||||||||||||||||||||
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Memory controller[edit]
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
[Edit/Modify Memory Info]
| Integrated Memory Controller | ||||||||||||||||
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Expansions[edit]
This processor has 16 PCIe lanes, 1x8 designated for a discrete GPU, 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals (e.g., WiFi or LTE).
[Edit/Modify Expansions Info]
| Expansion Options | |||||
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Graphics[edit]
[Edit/Modify IGP Info]
| Integrated Graphics Information | ||||||||||||||||||
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| [Edit] Zen 2 with Radeon Vega Hardware Accelerated Video Capabilities | |||||
|---|---|---|---|---|---|
| Codec | Encode | Decode | |||
| VP9 8bpc/10bpc | 1080p2404K 60 FPS | ||||
| MPEG-4 AVC (H.264) 8b | 1080p2404K 60 FPS | 1080p4804K 120 FPS | |||
| HEVC (H.265) 8bpc/10bpc | 1080p2404K 60 FPS | 1080p2404K 60 FPS | |||
Features[edit]
[Edit/Modify Supported Features]
| Supported x86 Extensions & Processor Features | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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Die[edit]
Main article: Zen 2 § DieRenoir microprocessors are fabricated on TSMC's 7-nanometer process. This SoC integrates 9.8 billion transistors on a single 156 mm² monolithic die which includes both the Zen 2 CPU cores along with the Vega GPU and various other additional components.
- 7-nanometer process (N7)
- 9,800,000,000 transistors
- 156 mm² die size
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