| Edit Values |
| Ryzen 7 2700 |
| General Info |
| Designer | AMD |
| Manufacturer | GlobalFoundries |
| Model Number | 2700 |
| Part Number | YD2700BBM88AF |
| Market | Desktop |
| Introduction | April 13, 2018 (announced)April 19, 2018 (launched) |
| Release Price | $299 |
| Shop | Amazon |
| General Specs |
| Family | Ryzen 7 |
| Series | 2000 |
| Locked | No |
| Frequency | 3,200 MHz |
| Turbo Frequency | 4,100 MHz |
| Bus rate | 4 × 8 GT/s |
| Clock multiplier | 32 |
| Microarchitecture |
| ISA | x86-64 (x86) |
| Microarchitecture | Zen+ |
| Chipset | Promontory |
| Core Name | Pinnacle Ridge |
| Core Family | 23 |
| Core Model | 8 |
| Core Stepping | B2 |
| Process | 12 nm |
| Transistors | 4,800,000,000 |
| Technology | CMOS |
| Die | 213 mm² |
| Word Size | 64 bit |
| Cores | 8 |
| Threads | 16 |
| Max Memory | 64 GiB |
| Multiprocessing |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical |
| TDP | 65 W |
| Packaging |
| Package | OPGA-1331 |
| Package Type | Organic Micro Pin Grid Array |
| Dimension | 40 mm × 40 mm |
| Pitch | 1 mm |
| Contacts | 1331 |
| Socket | Socket AM4 |
Ryzen 7 2700 is a 64-bit octa-core high-end performance x86 desktop microprocessor introduced by AMD in early 2018. Fabricated on GlobalFoundries 12 nm process based on the Zen+ microarchitecture, this processor operates at 3.2 GHz with a TDP of 65 W and a Boost frequency of up to 4.1 GHz. The 2700 supports up to 64 GiB of dual-channel DDR4-2933 memory.
Contents
- 1 Cache
- 2 Memory controller
- 3 Expansions
- 4 Graphics
- 5 Features
Cache[edit]
Main article: Zen+ § Cache [Edit/Modify Cache Info]
 | Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.Note: All units are in kibibytes and mebibytes. |
| L1$ | 768 KiB786,432 B 0.75 MiB | | L1I$ | 512 KiB524,288 B 0.5 MiB | 8x64 KiB | 4-way set associative | |
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| L1D$ | 256 KiB262,144 B 0.25 MiB | 8x32 KiB | 8-way set associative | write-back |
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| L2$ | 4 MiB4,096 KiB 4,194,304 B 0.00391 GiB | | | | 8x512 KiB | 8-way set associative | write-back |
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| L3$ | 16 MiB16,384 KiB 16,777,216 B 0.0156 GiB | | | | 2x8 MiB | 16-way set associative | |
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Memory controller[edit]
[Edit/Modify Memory Info]
 | Integrated Memory Controller |
| Max Type | DDR4-2933, DDR3-2933 |
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| Supports ECC | No |
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| Max Mem | 64 GiB |
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| Controllers | 2 |
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| Channels | 2 |
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| Max Bandwidth | 43.71 GiB/s44,759.04 MiB/s 46.933 GB/s 46,933.255 MB/s 0.0427 TiB/s 0.0469 TB/s |
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| Bandwidth | Single 21.86 GiB/sDouble 43.71 GiB/s |
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| [Edit] Memory Configurations |
| Dual Channel | Single Rank | 2 of 2 | DDR4-2933* |
| 2 of 4 | DDR4-2933* |
| 4 of 4 | DDR4-2133 |
| Double Rank | 2 of 2 | DDR4-2667 |
| 2 of 4 | DDR4-2400 |
| 4 of 4 | DDR4-1866 |
Expansions[edit]
The 2700 includes 20 PCIe lanes - 16 for a discrete graphics processor and 4 for storage (NVMe or 2 ports SATA Express).
[Edit/Modify Expansions Info]
 | Expansion Options |
| PCIe | | Revision | 3.0 |
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| Max Lanes | 20 |
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| Configs | 1x16+1x4 |
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| USB | | Revision | 3.0, 2.0 |
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| Ports | 4 |
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| Rate | 5 Gbit/s |
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- SPI, LPC, UART, I2C, SMBus
Graphics[edit]
This processor has no integrated graphics.
Features[edit]
[Edit/Modify Supported Features]
 | Supported x86 Extensions & Processor Features |
| MMX | MMX Extension |
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| EMMX | Extended MMX Extension |
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| SSE | Streaming SIMD Extensions |
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| SSE2 | Streaming SIMD Extensions 2 |
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| SSE3 | Streaming SIMD Extensions 3 |
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| SSSE3 | Supplemental SSE3 |
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| SSE4.1 | Streaming SIMD Extensions 4.1 |
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| SSE4.2 | Streaming SIMD Extensions 4.2 |
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| SSE4a | Streaming SIMD Extensions 4a |
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| AVX | Advanced Vector Extensions |
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| AVX2 | Advanced Vector Extensions 2 |
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| ABM | Advanced Bit Manipulation |
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| BMI1 | Bit Manipulation Instruction Set 1 |
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| BMI2 | Bit Manipulation Instruction Set 2 |
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| FMA3 | 3-Operand Fused-Multiply-Add |
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| AES | AES Encryption Instructions |
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| RdRand | Hardware RNG |
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| SHA | SHA Extensions |
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| ADX | Multi-Precision Add-Carry |
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| CLMUL | Carry-less Multiplication Extension |
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| F16C | 16-bit Floating Point Conversion |
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| x86-16 | 16-bit x86 |
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| x86-32 | 32-bit x86 |
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| x86-64 | 64-bit x86 |
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| Real | Real Mode |
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| Protected | Protected Mode |
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| SMM | System Management Mode |
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| FPU | Integrated x87 FPU |
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| NX | No-eXecute |
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| SMT | Simultaneous Multithreading |
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| AMD-Vi | AMD-Vi (I/O MMU virtualization) |
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| AMD-V | AMD Virtualization |
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| SenseMI | SenseMI Technology |
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| XFR 2 | Extended Frequency Range 2 |
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| Boost 2 | Precision Boost 2 |
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